Abstract :
The author presents an overview of the 370 microprocessor chip set, which consists of the processing unit, floating-point, bus-to-bus adapter, cache controller, and memory controller chips. The memory controller is described in detail. The existing CMOS 1-μm technology and design system are illustrated from logic input up to mask data generation. Logic simulation aspects are described in a way suitable for designers. The primary tasks of a memory controller are shown, subdivided into controller-controlled functions (refresh, error detection and correction, address checking, scrib), additional features (diagnostics, speed control, debug facilities, self-test on chip), and system-controlled functions, (memory accesses, message commands). Performance data of the realized memory controller and its floorplan are given. Costs and turnaround times are discussed
Keywords :
CMOS integrated circuits; VLSI; microprocessor chips; storage management chips; 370 microprocessor chip set; CMOS; VLSI; address checking; bus-to-bus adapter; cache controller; controller-controlled functions; costs; debug facilities; diagnostics; error correction; error detection; floating-point; floorplan; logic input; logic simulation; mask data generation; memory accesses; memory controller chips; message commands; performance data; processing unit; refresh; scrib; self-test on chip; speed control; system-controlled functions; turnaround times; Built-in self-test; CMOS logic circuits; CMOS technology; Control systems; Error correction; Logic design; Microprocessor chips; System-on-a-chip; Velocity control; Very large scale integration;
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
