DocumentCode :
3237108
Title :
A 6-GHz 64×3-bit ROM for DDS application in GaAs technology
Author :
Chen, Jianwu ; Wu, Danyu ; Chen, Gaopeng ; Jin, Zhi ; Liu, Xinyu
Author_Institution :
Inst. of Microelectron., Chinese Acad. of Sci., Beijing, China
fYear :
2010
fDate :
8-11 May 2010
Firstpage :
539
Lastpage :
542
Abstract :
A 64 × 3-bit read-only memory (ROM), employing dual decoder architecture, is designed in GaAs HBT technology. It is adopted in Direct Digital Synthesizer (DDS) for phase-to-amplitude conversion. To enhance the performance of the ROM, the memory cell is designed with a transistor to assign both a high and low bit value. The ROM draws a current of 130 mA from a -4.6 V power supply. Using 700 GaAs HBT transistors, the total area is 1.2 × 0.6 mm2. The ROM is integrated as part of an 8-bit DDS, which is measured to work functionally at 6 GHz. This paper demonstrates a fastest GaAs HBT ROM for DDS.
Keywords :
III-V semiconductors; direct digital synthesis; gallium arsenide; heterojunction bipolar transistors; read-only storage; DDS application; GaAs HBT technology; GaAs technology; ROM; direct digital synthesizer; dual decoder architecture; frequency 6 GHz; memory cell; phase-to-amplitude conversion; read-only memory; Capacitance; Circuits; Decoding; Delay; Diodes; Gallium arsenide; Heterojunction bipolar transistors; Read only memory; Synthesizers; Table lookup; Gallium Arsenide (GaAs); bipolar memory; direct digital frequency synthesizer (DDFS); direct digital synthesizer (DDS); heterojunction bipolar transistor (HBT); read-only memory (ROM); sense amplifier;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave and Millimeter Wave Technology (ICMMT), 2010 International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-5705-2
Type :
conf
DOI :
10.1109/ICMMT.2010.5525218
Filename :
5525218
Link To Document :
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