• DocumentCode
    3237140
  • Title

    GALLOP: genetic algorithm based low power FSM synthesis by simultaneous partitioning and state assignment

  • Author

    Venkataraman, Ganesh ; Reddy, Sudhakar M. ; Pomeranz, Irith

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
  • fYear
    2003
  • fDate
    4-8 Jan. 2003
  • Firstpage
    533
  • Lastpage
    538
  • Abstract
    Partitioning has been shown to be an effective method for synthesis of low power finite state machines. In this approach, an FSM is partitioned into two or more coupled sub-machines such that most of the time only one of the sub-machines is active. In this paper, we present a GA based approach for simultaneous partitioning and state assignment of finite state machines with power reduction as the objective. Experimental results obtained compare favorably with previous works on FSM partitioning, low power state assignment as well as using GA for partitioning alone.
  • Keywords
    finite state machines; genetic algorithms; logic CAD; logic partitioning; low-power electronics; state assignment; GA based approach; GALLOP; coupled sub-machines; finite state machines; genetic algorithm; low power FSM synthesis; low power state assignment; partitioning; power reduction; state assignment; Automata; Circuit synthesis; Cities and towns; Cost function; Encoding; Flip-flops; Genetic algorithms; Minimization; Power dissipation; Sequential circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2003. Proceedings. 16th International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-1868-0
  • Type

    conf

  • DOI
    10.1109/ICVD.2003.1183189
  • Filename
    1183189