Analysis of high power IGBT short circuit failures

The next linear collider (NLC) accelerator proposal at SLAC requires a highly efficient and reliable, low cost, pulsed-power modulator to drive the klystrons. A solid-state induction modulator has been developed at SLAC to power the klystrons; this modulator uses commercial high voltage and high current insulated gate bipolar transistor (IGBT) modules. Testing of these IGBTs under pulsed conditions was very successful; however, the IGBTs failed when tests were performed into a low inductance short circuit. The internal electrical connections of a commercial IGBT package have been analyzed to extract self and mutual partial inductances for the main current paths as well as for the gate structure. The IGBT package, together with the partial inductances, has been modeled using PSpice. Predictions for electrical paths that carry the highest current correlate with the sites of failed dies under short circuit tests. A similar analysis has been carried out for a SLAC proposal for an IGBT layout. This paper discusses the mathematical model of the IGBT geometry and presents simulation results.