Title :
Sacrificial oxidation techniques of top Si layer to reduce source-to-drain leakage current in 0.25-μm MOSFETs/SIMOX
Author :
Nakashima, S. ; Ohno, T. ; Nakamura, S. ; Ueki, T. ; Kado, Y. ; Tsuchiya, T. ; Takeda, T. ; Sakai, T.
Author_Institution :
NTT LSI Labs., Atsugi, Japan
fDate :
30 Sep-3 Oct 1996
Abstract :
Summary form only given. CMOS/SIMOX technology is promising for future low-power and high-speed ULSIs, and the advantages of 0.25 μm CMOS/SIMOX LSIs have already been demonstrated. As the channel length becomes smaller and the number of MOSFETs in LSIs increases, the unexpected flow of a large source-to-drain (S/D) leakage current is often a problem. It is important that this current be reduced for LSI applications. This paper shows that the OSFs (Oxidation-induced Stacking Faults) in the top Si that are generated during sacrificial thermal oxidation greatly increase S/D leakage current. Methods to reduce this leakage current are proposed
Keywords :
CMOS integrated circuits; MOSFET; annealing; integrated circuit technology; large scale integration; leakage currents; oxidation; 0.25 micron; CMOS/SIMOX technology; LSI applications; MOSFETs; Si; leakage current reduction; oxidation-induced stacking faults; sacrificial thermal oxidation; source-to-drain leakage current; top Si layer; Annealing; Electron devices; Leakage current; MOSFETs; Oxidation; Temperature; Voltage;
Conference_Titel :
SOI Conference, 1996. Proceedings., 1996 IEEE International
Conference_Location :
Sanibel Island, FL
Print_ISBN :
0-7803-3315-2
DOI :
10.1109/SOI.1996.552525