The VLSI `silicon compiler´ design process

The author describes a VLSI design process developed by a team of logic designers and design-tools specialists at the IBM Laboratory at Hursley in England. A design, to be implemented in VLSI hardware, is partitioned into a number of smaller units. The design of each smaller unit is entered as text in a high-level language as a technology-independent behavioral description, which is then compiled for input to logic synthesis, where it is converted into an optimized design in the target VLSI technology. When all the smaller units to be integrated into a single VLSI integrated circuit (IC) have undergone this process, they are assembled together by a further run of logic synthesis. The resulting IC design, in the largest technology, is then processed to produce the artwork and test patterns required for manufacture of the IC. In support of all these activities, a number of programs exist to allow the design team to perform simulation, timing analysis, and validation of the logic-synthesis process