Phase detector models and their performances for IF/baseband frequency recovery for complex envelope based DSP implemented PLL

Author

Kandeepan, Sithamparanathan ; Reisenfeld, Sam

Author_Institution

Fac. of Eng., Univ. of Technol., Sydney, NSW, Australia

Volume

2

fYear

2002

fDate

25-28 Nov. 2002

Firstpage

774

Abstract

This paper discusses four phase detector (PD) models that could be used in DSP implemented phase locked loops (PLL) for frequency recovery at intermediate frequency (IF) or at baseband. The PD models, which are nonlinear functions in general, can be easily implemented in DSP. The steady state and the acquisition performances of the PD models are discussed and compared with each other, and the noise statistics are explored by means of computer experiments and numerical analysis.

Keywords

digital signal processing chips; frequency estimation; phase detectors; phase locked loops; phase noise; signal processing; synchronisation; DSP implemented phase locked loops; PLL; acquisition performances; baseband; frequency recovery; intermediate frequency; nonlinear functions; phase detector models; steady state performances; Baseband; Digital signal processing; Envelope detectors; Frequency locked loops; Numerical analysis; Phase detection; Phase frequency detector; Phase locked loops; Statistical analysis; Steady-state;

fLanguage

English

Publisher

ieee

Conference_Titel

Communication Systems, 2002. ICCS 2002. The 8th International Conference on

Print_ISBN

0-7803-7510-6

Type

conf

DOI

10.1109/ICCS.2002.1183235

Filename

1183235