Efficient Residue Reduction Algorithm using DSP Circular Buffer Registers

A simple and efficient residue reduction algorithm is presented. This algorithm is suitable for DSP hardware architecture and can be used successfully in small residue systems to speed up modulo calculation, which tend to be computationally intensive operation. The technique uses a lookup table (LUT) of finite length with circular buffer registers, which makes it quick to implement and naturally fast to perform as it uses hardware rather than software to run. Simulation results are given to prove the validity of this algorithm for small residue systems.