SystemC-based Modelling, Seamless Refinement, and Synthesis of a JPEG 2000 Decoder

This paper will exemplarily describe and evaluate the OSSS methodology for embedded hardware/software systems and its use in a JPEG 2000 decoder case-study. The OSSS approach defines a design flow starting from an Application Model providing a rich subset of SystemC^TM/C++ augmented with specific OSSS language concepts. It can be used to identify the most promising parallel structure by comparing different design alternatives. A clearly defined refinement process leads to the Virtual Target Architecture (VTA) Model. These refinements enable an analysis of the system behaviour at cycle-accurate granularity and support the exploration of different target architectures for the JPEG 2000 decoder. VTA models can be used as direct input for the FOSSY synthesis tool, which performs an automatic transformation into implementation models; that is to generate VHDL code for hardware, C/C++ for software, and platform configuration files for the target technology.