Bias Selection for Conversion and Linearity Optimization in a GaN HEMT Resistive Mixer

In this paper, an experimental GaN HEMT grown on sapphire substrate is employed for designing and testing a resistive mixer. Based on an appropriate characterization of the transistor output conductance and its higher order derivatives, the gate-to-source bias voltage may be selected for optimizing the conversion loss, while the use of a small drain-to-source bias value helps improving its linearity. Simulation and measurement results are provided, demonstrating a significant reduction of third order intermodulation distortion, about 14 dBs less than the true cold FET operation case, maintaining the same information signal level at the output