Title :
A power efficient implementation of the discrete cosine transform
Author :
Schimpfle, Christian V. ; Rieder, Peter ; Nossek, Josef A.
Author_Institution :
Inst. for Network Theory & Circuit Design, Munich Univ. of Technol., Germany
Abstract :
A new efficient implementation of a IEEE-standard conform 8 point discrete cosine transform (DCT) is presented. The architecture is based on different classes of orthogonal 2/spl times/2 /spl mu/-rotations used to approximate the angles of the DCT. By using only orthogonal /spl mu/-rotations it is guaranteed, that the whole transform remains orthogonal and perfect reconstruction of the signal can be achieved. It is shown that for the implementation of the DCT with approximated rotation angles (angle quantization) about 28% less shift and add operations are necessary than for a standard conform implementation with coefficient quantization. This lends to a large power benefit due to less adder hardware and less capacitive load of the global interconnects. Besides this, there are some other advantageous aspects concerning the area and delay. To support the full custom design of the layout, module generators for all the different classes /spl mu/-rotations can be used to generate the necessary rotations automatically.
Keywords :
IEEE standards; VLSI; digital arithmetic; digital signal processing chips; discrete cosine transforms; quantisation (signal); signal flow graphs; signal reconstruction; 8 point DCT; DCT hardware; IEEE-standard; VLSI; adder hardware; angle quantization; approximated rotation angles; area; capacitive load; coefficient quantization; delay; discrete cosine transform; full custom layout design; global interconnects; module generators; optimised flow graph; orthogonal /spl mu/-rotations; perfect signal reconstruction; power efficient implementation; shift and add operations; Adders; Circuit synthesis; Decorrelation; Discrete cosine transforms; Energy consumption; Hardware; Image coding; Integrated circuit interconnections; Matrix decomposition; Signal processing algorithms;
Conference_Titel :
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-8186-8316-3
DOI :
10.1109/ACSSC.1997.680540