DocumentCode
3240282
Title
An Analog On-Chip Adaptive Body Bias Calibration for Reducing Mismatches in Transistor Pairs
Author
Bacinschi, P.B. ; Murgan, T. ; Koch, K. ; Glesner, M.
Author_Institution
Inst. of Microelectron. Syst., Tech. Univ. Darmstadt, Darmstadt
fYear
2008
fDate
10-14 March 2008
Firstpage
698
Lastpage
703
Abstract
Device parameter variations exhibit an increasingly serious impact on analog and mixed-signal circuit behavior. In this paper, we propose a novel fully-analog on-chip adaptive body bias calibration method, for efficiently reducing mismatches in transistor pairs. We present three circuit implementations which achieve a mismatch reduction between 61% and 73% in terms of standard deviation.
Keywords
CMOS analogue integrated circuits; MOSFET; calibration; integrated circuit reliability; mixed analogue-digital integrated circuits; MOSFET; analog on-chip adaptive body bias calibration; circuit implementation; device parameter variations; mismatch reduction; mixed-signal circuit; transistor pairs; CMOS technology; Calibration; Circuit testing; Delay; Digital circuits; Frequency; MOS devices; Microelectronics; System-on-a-chip; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location
Munich
Print_ISBN
978-3-9810801-3-1
Electronic_ISBN
978-3-9810801-4-8
Type
conf
DOI
10.1109/DATE.2008.4484760
Filename
4484760
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