A Methodology to Model and Predistort Short-Term Memory Nonlinearities in Power Amplifiers

This paper presents a study on the suitability of using certain dynamic nonlinear models for modelling the power amplifier (PA) with memory effects in terms of accuracy (that is how it resembles the real data) and complexity (number of coefficients needed in the parameterization). Later, focusing in the digital predistorter (PD) model identification and taking into account the main predistortion quality indicators (adjacent channel power ratio ACPR, error vector magnitude EVM at the transmitter, and the bit error rate BER at the receiver), a Hammerstein based predistorter is proposed and a new empirical method for choosing the best delays contributing in the Hammerstein model is presented. This previous empirical study permits the use of the most significant delays contributing in the predistortion process. Therefore the digital predistorter remains scalable which is an important factor of merit since it has to be capable of being implemented in a digital signal processor