DocumentCode :
3240545
Title :
System design approach to power aware mobile computers
Author :
Warren, J. ; Martin, T. ; Smailagic, A. ; Siewiorek, D.P.
Author_Institution :
Inst. for Complex Engineered Syst., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear :
2003
fDate :
20-21 Feb. 2003
Firstpage :
101
Lastpage :
106
Abstract :
This paper describes a system level design approach to power awareness in the wearable computers project at Carnegie Mellon University. The paper identifies the major components of power consumption in a mobile computer, evaluates their respective contributions to power consumption, and analyzes various techniques for improving their energy efficiency. The paper describes our research framework and experimental evaluations of techniques for improving energy efficiency of a system, ranging from the communication level down to the physical level of the battery. The work described includes techniques for dynamically varying the CPU clock frequency.
Keywords :
clocks; logic design; low-power electronics; optimisation; wearable computers; battery level energy efficiency; communication level energy efficiency; dynamically varied CPU clock frequency; mobile computer power consumption; mobile computer system design; power aware mobile computers; power/performance optimization; wearable computers; Batteries; Central Processing Unit; Clocks; Energy consumption; Energy efficiency; Frequency; Mobile communication; Mobile computing; System-level design; Wearable computers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on
Print_ISBN :
0-7695-1904-0
Type :
conf
DOI :
10.1109/ISVLSI.2003.1183359
Filename :
1183359
Link To Document :
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