Submicron delay calculation for accurate timing analysis

Technology trends indicate that due to higher switching speeds and smaller feature sizes, interconnect contributes up to 80% of the system delay. Thus it has become imperative to include interconnect effects in timing analysis to obtain meaningful results. Designers have recognized the need to accurately extract the RC interconnect. However, there has been an absence of methodology to accurately and efficiently abstract the timing implications of the extracted RC data to higher level timing tools. Submicron delay calculators are a new emerging trend to bridge this void