Title :
Precise tiling for uniform loop nests
Author :
Calland, Pierre-Yves ; Risset, Tanguy
Author_Institution :
Lab. LIP-IMAG, Ecole Normale Superieure de Lyon, France
Abstract :
The subject of this article is a hyperplane partitioning problem applied to perfect loop nests. This work is aimed at increasing the computation granularity to reduce the overhead due to communication. This study is different from previous work as it takes redundant communication into account. We propose an algorithm giving the optimal solution and various examples to show the validity of this report
Keywords :
parallel programming; computation granularity; hyperplane partitioning problem; precise tiling; uniform loop nests; Design methodology; Parallel processing; Parallel programming; Partitioning algorithms; Testing; Tiles;
Conference_Titel :
Application Specific Array Processors, 1995. Proceedings. International Conference on
Conference_Location :
Strasbourg
Print_ISBN :
0-8186-7109-2
DOI :
10.1109/ASAP.1995.522937
