DocumentCode :
3241311
Title :
Serialized Asynchronous Links for NoC
Author :
Ogg, S. ; Valli, E. ; Al-Hashimi, B. ; Yakovlev, A. ; Alessandro, C.D. ; Benini, L.
Author_Institution :
Southampton Univ., Southampton
fYear :
2008
fDate :
10-14 March 2008
Firstpage :
1003
Lastpage :
1008
Abstract :
This paper proposes an asynchronous serialized link for NoC that can achieve the same levels of performance in terms of flits per second as a synchronous link but with a reduced number of wires in the point to point switch links and reduced power consumption. This is achieved by employing serialization in the asynchronous domain as opposed to synchronous to facilitate the removal of global clocking on the serial links. Based on transistor level simulations using 0.12 mum foundry models it has been shown that it is possible to achieve the same level of performance as synchronous but with 75% reduction in wires and 65% reduction in power for a 300 MFlit/s link with 8 buffers with a switch clock speed of 300 MHz. Furthermore the paper presents the design requirements arising from interfacing switches of synchronous NoC and asynchronous serial links.
Keywords :
integrated circuit design; network-on-chip; asynchronous serialized link; frequency 300 MHz; global clocking; network-on-chip; point-to-point switch links; size 0.12 mum; Clocks; Communication switching; Costs; Energy consumption; Network-on-a-chip; Packet switching; Routing; Switches; Throughput; Wires; Asynchronous; Network-on-Chip; Point-to-Point Links; Serial;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location :
Munich
Print_ISBN :
978-3-9810801-3-1
Electronic_ISBN :
978-3-9810801-4-8
Type :
conf
DOI :
10.1109/DATE.2008.4484812
Filename :
4484812
Link To Document :
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