• DocumentCode
    3241685
  • Title

    Operating System Controlled Processor-Memory Bus Encryption

  • Author

    Chen, Xi ; Dick, Robert P. ; Choudhary, Alok

  • Author_Institution
    Electr. Eng. & Comput. Sci. Dept., Northwestern Univ., Evanston, IL
  • fYear
    2008
  • fDate
    10-14 March 2008
  • Firstpage
    1154
  • Lastpage
    1159
  • Abstract
    Unencrypted data appearing on the processor- memory bus can result in security violations, e.g., allowing attackers to gather keys to financial accounts and personal data. Although on-chip bus encryption hardware can solve this problem, it requires hardware redesign or increases processor cost. Application redesign to prevent sensitive data from appearing on the processor-memory bus is extremely difficult. We propose and evaluate a processor-memory bus encryption technique for embedded systems that requires no changes to applications or hardware. This technique exploits cache locking or scratchpad memory, features present in many embedded processors, permitting the operating system (OS) virtual memory infrastructure to automatically encrypt data belonging to protected processes as they are written to off-chip memory. Pages belonging to unprotected processes are stored unencrypted to prevent performance and energy consumption penalties. We evaluate the proposed bus encryption technique using full system simulation. Experimental results indicate that it is possible to prevent the working data sets of processes from appearing on the processor-memory bus in plaintext, without using dedicated hardware and without changing applications. The OS based technique results in 1.37times slowdown for protected processes for processors with 512 KB of L2 cache and 1.78times slowdown for processors with 256 KB of L2 cache. There are negligible performance penalties for unprotected processes.
  • Keywords
    cache storage; cryptography; embedded systems; job control languages; microprocessor chips; system buses; cache locking; data encryption; embedded systems; full system simulation; off-chip memory; on-chip bus encryption; processor-memory bus encryption; scratchpad memory; virtual memory infrastructure; Control systems; Costs; Cryptography; Data security; Embedded system; Energy consumption; Hardware; Operating systems; Process control; Protection;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2008. DATE '08
  • Conference_Location
    Munich
  • Print_ISBN
    978-3-9810801-3-1
  • Electronic_ISBN
    978-3-9810801-4-8
  • Type

    conf

  • DOI
    10.1109/DATE.2008.4484834
  • Filename
    4484834