DocumentCode
3241709
Title
Fully parametrable downsampler generator
Author
Naviner, L.A.B. ; Naviner, Jean-Francois ; De Barros, Marcelo Alves
Author_Institution
Dept. Commun. et Electronique, Ecole Nat. Superieure des Telecommun., Paris, France
fYear
2004
fDate
18-21 Dec. 2004
Firstpage
503
Lastpage
506
Abstract
This paper deals with customized implementation of downsampling processors. We present an all-programmable generator of downsamplers to synthetise efficient decimator filters for many applications. This tool, written in VHDL language, is able to create cascade of generic FIR/CIC filters and helps fast exploration/evaluation of different hardware solutions for a given problem.
Keywords
FIR filters; hardware description languages; hardware-software codesign; signal sampling; FIR-CIC filters; VHDL language; all-programmable generator; decimator filters; downsampling processor; Delta-sigma modulation; Demodulation; Filtering; Finite impulse response filter; Hardware; IIR filters; Interpolation; Sampling methods; Signal processing; Signal sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Information Technology, 2004. Proceedings of the Fourth IEEE International Symposium on
Print_ISBN
0-7803-8689-2
Type
conf
DOI
10.1109/ISSPIT.2004.1433828
Filename
1433828
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