DocumentCode
3241747
Title
Decimation filter compiler for oversampling A/D applications
Author
Hang, Soei-Shin ; Jain, Rajeev
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume
5
fYear
1992
fDate
23-26 Mar 1992
Firstpage
537
Abstract
A silicon compiler (DECGEN) which generates a decimation filter for oversampling A/D converters is described. It generates a multistage filter consisting of two stages of sinc filter and an equiripple bandshaping FIR filter. A heuristic procedure is derived for dividing the decimation ratio between the two stages of sinc filter in an optimum fashion. Digit serialization and hardware multiplexing are used for the target architecture in order to reduce silicon area
Keywords
analogue-digital conversion; circuit layout CAD; digital filters; DECGEN; decimation filter compiler; decimation ratio; equiripple bandshaping FIR filter; hardware multiplexing; heuristic procedure; multistage filter; oversampling A/D converters; silicon compiler; sinc filter; Attenuation; Bandwidth; Delta-sigma modulation; Digital filters; Digital modulation; Finite impulse response filter; Hardware; Passband; Sampling methods; Silicon compiler;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1992. ICASSP-92., 1992 IEEE International Conference on
Conference_Location
San Francisco, CA
ISSN
1520-6149
Print_ISBN
0-7803-0532-9
Type
conf
DOI
10.1109/ICASSP.1992.226564
Filename
226564
Link To Document