Variation issues in on-chip optical clock distribution

On-chip optical clock distribution is being investigated as a future means to increase clock speed and reduce clock power. While extremely small skew in the arrival of an on-chip optical signal can be achieved, the conversion of the optical signal to a local electrical clock may be subject to substantial variation. A baseline receiver circuit has been designed and fabricated. We find that sensitivity to device and operating condition variation reintroduces substantial clock skew. Future optical on-chip clock design approaches must take such variation sources into account