DocumentCode
3242222
Title
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies
Author
Gielen, G. ; De Wit, P. ; Maricau, E. ; Loeckx, J. ; Martin-Martinez, J. ; Kaczer, B. ; Groeseneken, G. ; Rodríguez, R. ; Nafría, M.
Author_Institution
Dept. Elektrotechniek ESAT-MICAS, Katholieke Univ. Leuven, Leuven
fYear
2008
fDate
10-14 March 2008
Firstpage
1322
Lastpage
1327
Abstract
With further scaling of nanometer CMOS technologies, yield and reliability become an increasing challenge. This paper reviews the most important phenomena affecting yield and reliability. For each effect, the basic physical mechanisms causing the effect and its impact on transistor parameters are described. Possible solutions to cope/handle with these effects on the design level are discussed as well.
Keywords
CMOS integrated circuits; integrated circuit reliability; integrated circuit yield; nanotechnology; integrated circuit reliability; integrated circuit yield; nanometer CMOS technologies; physical mechanisms; transistor parameters; CMOS technology; Degradation; Digital circuits; Fabrication; Integrated circuit reliability; Intrusion detection; MOS devices; Semiconductor device modeling; Stress; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location
Munich
Print_ISBN
978-3-9810801-3-1
Electronic_ISBN
978-3-9810801-4-8
Type
conf
DOI
10.1109/DATE.2008.4484862
Filename
4484862
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