Title :
High-level Modelling and Exploration of Coarse-grained Re-configurable Architectures
Author :
Chattopadhyay, Anupam ; Chen, Xiaolin ; Ishebabi, Harold ; Leupers, Rainer ; Ascheid, Gerd ; Meyr, Heinrich
Author_Institution :
Integrated Signal Process. Syst., RWTH Aachen Univ., Aachen
Abstract :
The increasing complexity of today´s multimedia and wireless applications is motivating the system designers to innovate continuously. With the challenge to keep various performance metrics in a tight balance while designing a complex system, an entire range of components are now being offered as choices for system building blocks. Coarse-Grained Re-configurable Architecture (CGRA), a strongly emerging class, is currently receiving due attention for offering excellent performance as well as flexibility post fabrication. Compared to the programmable and flexible microprocessors these architectures are shown to yield stronger performance, especially in case of regular and data-driven applications. A variety of system designs are proposed of late, with CGRA as one of the key building blocks. Most of the research initiatives taken in this area have resorted to a template-based approach, where the structure of the re-configurable architecture is partially fixed with several tunable parameters. In this paper, we present a language-driven modelling and exploration framework for CGRAs. In the domain of CGRAs, this framework attempts to bring modelling ease, genericity, early exploration and path to implementation together. The modelling formalism proposed in this paper as well as the exploration capabilities are demonstrated via experiments with several algorithmic kernels.
Keywords :
high level synthesis; logic design; microprocessor chips; programmable circuits; reconfigurable architectures; algorithmic kernels; coarse-grained re-configurable architectures; flexible microprocessors; high-level modelling; language-driven modelling; multimedia application; programmable microprocessors; system building blocks; system designs; wireless application; Fabrication; Field programmable gate arrays; Measurement; Multimedia systems; Reconfigurable architectures; Routing; Scheduling algorithm; Simultaneous localization and mapping; Topology; Tree graphs;
Conference_Titel :
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location :
Munich
Print_ISBN :
978-3-9810801-3-1
Electronic_ISBN :
978-3-9810801-4-8
DOI :
10.1109/DATE.2008.4484864