DocumentCode :
3242261
Title :
Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing
Author :
Takahashi, Hiroshi ; Yanagida, Nobuhiro ; Takamatsu, Yuzo
Author_Institution :
Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan
fYear :
1995
fDate :
23-24 Nov 1995
Firstpage :
58
Lastpage :
64
Abstract :
In this paper, we improve the previous method by enhancing a set of diagnostic tests and using an EB testing method. We first enhance the previous set of diagnostic tests to one of diagnostic tests consisting of the four sets, TP-1, TP-2, TP-3 and TP-4. We next present two diagnostic methods by using the enhanced diagnostic tests and an electron-beam tester (EB-tester). Experimental results show that the presented method identified fault locations within 0.2 to 5% of all stuck-at faults on all lines in the circuit by probing about 0.8 to 15% internal lines
Keywords :
VLSI; combinational circuits; electron beam testing; fault diagnosis; fault location; logic testing; EB testing; TP-1; TP-2; TP-3; TP-4; combinational circuits; diagnostic resolution; electron-beam tester; fault location; internal lines; multiple fault diagnosis; sensitized paths; stuck-at faults; Algorithm design and analysis; Cause effect analysis; Circuit faults; Circuit testing; Combinational circuits; Computer science; Fault diagnosis; Fault location; Large scale integration; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 1995., Proceedings of the Fourth Asian
Conference_Location :
Bangalore
Print_ISBN :
0-8186-7129-7
Type :
conf
DOI :
10.1109/ATS.1995.485317
Filename :
485317
Link To Document :
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