Title :
DC control and observation structures for analog circuits
Author :
Ruey Shieh, Yeong ; Wen Wu, Cheng
Author_Institution :
Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
As the complexity of electronic circuits and systems increases, so does the complexity of testing them. The level-sensitive scan-design (LSSD) structure used in a digital circuit enhances the controllability and observability of the circuit under test. For analog circuits, there also are several approaches proposed to improve their observability, based on the LSSD concept. However, none of these approaches provide control and observation capability for all test points simultaneously. In this paper, we propose two control and observation structures for analog circuits without using extra power supply. Using our approach, one is able to observe and control the DC voltage levels of all test points simultaneously, which is the basic diagnosis capability for the analog circuit under test. A calibration process is presented to ensure the accuracy of the excitation and read-out voltage levels
Keywords :
VLSI; calibration; controllability; fault diagnosis; integrated circuit testing; mixed analogue-digital integrated circuits; observability; DC voltage levels; VLSI; analog circuits; calibration process; controllability; diagnosis capability; level-sensitive scan-design; mixed signal circuits; observability; read-out voltage levels; test points; Analog circuits; Circuit testing; Controllability; Digital circuits; Electronic circuits; Electronic equipment testing; Observability; Power supplies; System testing; Voltage control;
Conference_Titel :
Test Symposium, 1995., Proceedings of the Fourth Asian
Conference_Location :
Bangalore
Print_ISBN :
0-8186-7129-7
DOI :
10.1109/ATS.1995.485326