• DocumentCode
    3242801
  • Title

    Built-in Clock Skew System for On-line Debug and Repair

  • Author

    Chattopadhyay, Atanu ; Zilic, Zeljko

  • Author_Institution
    Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC
  • fYear
    2008
  • fDate
    10-14 March 2008
  • Firstpage
    248
  • Lastpage
    251
  • Abstract
    We present a low-cost on-line system for clock skew management in integrated circuits. Our built-in clock skew system (BICSS) uses a centralized approach to identify, quantify and correct skew using a two-step method. The technique assesses the time-off-light between the central debug circuitry and each region, or tap under test to account for the measurement error due to differences in path length common in existing techniques. The system can be used to detect skew above a user-adjustable margin using a variable tolerance phase detector. The result is a solution which provides silicon debug and repair capability of on-chip clock skews with a very small area overhead.
  • Keywords
    clocks; delay circuits; integrated circuit testing; logic testing; measurement errors; phase detectors; BICSS; built-in clock skew system; central debug circuitry; clock skew management; integrated circuits; measurement error; on-chip clock skews; on-line debug; on-line repair; silicon debug; two-step method; user-adjustable margin; variable tolerance phase detector; Added delay; Circuit testing; Clocks; Delay lines; Detectors; Integrated circuit interconnections; Integrated circuit measurements; Multiplexing; Phase detection; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2008. DATE '08
  • Conference_Location
    Munich
  • Print_ISBN
    978-3-9810801-3-1
  • Electronic_ISBN
    978-3-9810801-4-8
  • Type

    conf

  • DOI
    10.1109/DATE.2008.4484890
  • Filename
    4484890