DocumentCode
3242999
Title
Energy Efficient and High Speed On-Chip Ternary Bus
Author
Duan, Chunjie ; Khatri, Sunil P.
Author_Institution
Mitsubishi Electr. Res. Labs, Cambridge, MA
fYear
2008
fDate
10-14 March 2008
Firstpage
515
Lastpage
518
Abstract
We propose two crosstalk reducing coding schemes using ternary busses. In addition to low power consumption and reduced delay, our schemes offer other advantages over binary coding schemes such as zero area overhead and simple, regular and fast codec design.
Keywords
codecs; crosstalk; integrated circuit design; integrated circuit interconnections; ternary codes; binary coding schemes; crosstalk reducing coding schemes; fast codec design; on-chip bus interconnects; on-chip ternary bus; zero area overhead; Codecs; Crosstalk; Delay; Energy consumption; Energy efficiency; Logic; Parasitic capacitance; Power system interconnection; System performance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location
Munich
Print_ISBN
978-3-9810801-3-1
Electronic_ISBN
978-3-9810801-4-8
Type
conf
DOI
10.1109/DATE.2008.4484901
Filename
4484901
Link To Document