A programmable multiple-sequence generator for BIST applications

Author

Sheu, Meng Lieh ; Lee, Chung Len

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

1995

fDate

23-24 Nov 1995

Firstpage

279

Lastpage

285

Abstract

In this paper, a programmable multiple-sequence generation scheme, which is constructed from a two-dimension-like feedback shift register structure, to generate a set of deterministic sequence of vectors followed by pseudo-random vectors is presented. A sequence segmentation method is employed to handle a long sequence of vectors. The proposed scheme has a regular structure, and the sequences so generated are more efficient in detecting faults for sequential circuit testing, stuck-open fault testing and delay fault testing. Hence, it is very suitable for the BIST application for MCM testing

Keywords

binary sequences; built-in self test; delays; logic testing; sequential circuits; shift registers; BIST applications; MCM testing; delay fault testing; deterministic sequence; programmable multiple-sequence generator; pseudo-random vectors; regular structure; sequence segmentation method; sequential circuit testing; stuck-open fault testing; two-dimension-like feedback shift register; Built-in self-test; Circuit faults; Circuit testing; Delay; Electrical fault detection; Fault detection; Feedback; Sequential analysis; Sequential circuits; Shift registers;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1995., Proceedings of the Fourth Asian

Conference_Location

Bangalore

Print_ISBN

0-8186-7129-7

Type

conf

DOI

10.1109/ATS.1995.485348

Filename

485348