DocumentCode
3243197
Title
Getting high-performance silicon from system-level design
Author
Davis, W. Rhett
Author_Institution
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear
2003
fDate
20-21 Feb. 2003
Firstpage
238
Lastpage
243
Abstract
System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part because they do little to help designers optimize hardware. This paper presents a brief summary of three system-level design techniques. Platform-based design, SystemC, and Chip-in-a-day, in order to propose that more system-level abstraction of physical performance is needed to make these techniques more useful. An analysis of design-productivity for three chips designed with the Chip-in-a-Day flow is also presented.
Keywords
application specific integrated circuits; circuit CAD; integrated circuit design; SystemC; chip-in-a-day; design-productivity; high-performance silicon; physical performance; platform-based design; productivity gap; system-level abstraction; system-level design; system-level design techniques; Acceleration; Circuit optimization; Design automation; Design optimization; Energy efficiency; Fabrication; Hardware; Productivity; Silicon; System-level design;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on
Print_ISBN
0-7695-1904-0
Type
conf
DOI
10.1109/ISVLSI.2003.1183482
Filename
1183482
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