Title :
De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs
Author :
Hosseinabady, Mohammad ; Kakoee, Mohammad Reza ; Mathew, Jimson ; Pradhan, Dhiraj K.
Author_Institution :
Univ. of Bristol, Bristol
Abstract :
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring, we propose an optimum tile-based implementation for a GBDB- based Network-on-Chip (NoC). Our experimental results show that the latency and energy consumption of generalized de Bruijn graph are much less with compared to Mesh and Torus, the two common NoC architectures in the literature.
Keywords :
graph theory; logic design; network topology; network-on-chip; energy efficient massive NoC; generalized binary de Bruijn graph; low-latency scalable architecture; network topology; network-on-chip design; on-chip communication network; two-layer wiring; Delay; Energy consumption; Energy efficiency; Network topology; Network-on-a-chip; Routing; Shift registers; Switches; Telecommunication network reliability; Wiring;
Conference_Titel :
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location :
Munich
Print_ISBN :
978-3-9810801-3-1
Electronic_ISBN :
978-3-9810801-4-8
DOI :
10.1109/DATE.2008.4484930
