Performance Impact of Using Denormalized Numbers in Basic Floating-point Operations

Author

Tenca, Alexandre F. ; Han, Kyung-Nam ; Tran, David

Author_Institution

Synopsys, Inc., Hillsboro

fYear

2007

fDate

4-7 Nov. 2007

Firstpage

348

Lastpage

352

Abstract

Manipulation of denormalized numbers in circuits for floating-point operations comes at a reasonable cost. IEEE standard 754 defines the use of denormalized values. They are incorporated into high-performance CPUs and they are gaining space in commercial products. This paper describes the extra processing steps that are required for the manipulation of denormalized numbers in floating-point addition and floating-point multiplication. It also provides the results of several experiments that show the average additional cost that designers face when creating these basic operations using cell libraries, for some CMOS technologies.

Keywords

CMOS integrated circuits; IEEE standards; floating point arithmetic; microprocessor chips; CMOS; IEEE standard 754; cell libraries; denormalized number manipulation; floating-point addition; floating-point multiplication; high-performance CPUs; performance impact; Application software; CMOS technology; Circuit synthesis; Costs; Digital arithmetic; Floating-point arithmetic; Hardware; Integrated circuit technology; Libraries; addition; arithmetic; denormalized numbers; floating-point; multiplication;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

978-1-4244-2109-1

Electronic_ISBN

1058-6393

Type

conf

DOI

10.1109/ACSSC.2007.4487227

Filename

4487227