A Parallel SystemC Environment: ArchSC

In domains of VLSI and the rising SoC, the system design exceedingly depends on the simulation and modeling. Conventional HDLs have some weakness including the extravagant precision and the slow speed. On the other hand, the system-level modeling, such as SystemC, has been widely used on all kinds of projects and achieved favorable results. When the target system scales excessively up, the simulation speed also drops to the most extern. So, it is very important to speed up by parallelizing the system-level modeling over HPC such as cluster. This paper introduces a novel parallel SystemC environment named ArchSC which is constructed on a large-scale system-level parallel simulation platform, ArchSim. The test results demonstrate that ArchSC has some advantages of high scalability, good generality and preferable acceleration performance.