Development of an ASIP-based singular value decomposition processor in SVD-MIMO systems

In Multiple-Input Multiple-Output (MIMO) wireless systems, singular value decomposition (SVD) is used for a beamforming in SVD-MIMO systems. A beamforming can improve the performance of MIMO transmission because signal interference among antennas is suppressed. This paper describes an architecture of singular value decomposition processor in SVD-MIMO for 4 to 16 transmitter and receiver antennas. The proposed processor is based on ASIP architecture and uses floating-point units to achieve design flexibility and high-precision computation. We optimized the SVD algorithm by determining the minimum number of QR method iterations according to each size of MIMO channel matrix. In the result, circuit scale was 54.5 k logic gates, and computation time for an SVD of 16x16 complex-valued matrix was 6.6 ms at a maximum clock frequency of 400 MHz.