• DocumentCode
    3247020
  • Title

    Timing influenced general-cell genetic floorplanner

  • Author

    Sait, Sadiq M. ; Youssef, Habib ; Tanvir, Shahid ; Benten, M.S.T.

  • Author_Institution
    Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia
  • fYear
    1995
  • fDate
    29 Aug-1 Sep 1995
  • Firstpage
    135
  • Lastpage
    140
  • Abstract
    In this paper we present a timing-influenced floorplanner for general cell IC design. The floorplanner works in two phases. In the first phase we restrict the modules to be rigid and the floorplan to be slicing. The second phase of floorplanner allows modification to the aspect ratios of individual modules to further reduce the area of the overall bounding box. The first phase is implemented using genetic algorithm while in the second phase we adopt a constraint graph based approach. Experimental results are also presented
  • Keywords
    circuit layout; circuit layout CAD; genetic algorithms; bounding box; constraint graph; general cell IC design; genetic floorplanner; timing sensitive floorplanning; Design engineering; Genetic algorithms; Guidelines; Integrated circuit interconnections; Iterative methods; Pins; Routing; Shape; Space exploration; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
  • Conference_Location
    Chiba
  • Print_ISBN
    4-930813-67-0
  • Type

    conf

  • DOI
    10.1109/ASPDAC.1995.486214
  • Filename
    486214