A novel thin film transistor for high voltage circuitry on glass

Author

Clough, F.J. ; Chen, Y. ; Narayanan, E. M Sankara ; Eccleston, W. ; Milne, W.I.

Author_Institution

Emerging Technols. Res. Centre, DeMontfort Univ., Leicester, UK

fYear

1997

fDate

26-29 May 1997

Firstpage

321

Lastpage

324

Abstract

This paper describes the operation and performance of a novel polysilicon high voltage thin film transistor (HVTFT) structure incorporating a Semi-Insulating (SI) field plate (SI HVTFT). Experimental data confirms that the semi-insulating layer reduces the on state current-pinching effect resulting in improved current drivability. In the off state the semi-insulating layer helps to reshape the potential distribution within the device offset region resulting in a high blocking capability. The 2-D numerical simulator MEDICI is used to gain an insight into the impact of the SI layer on device operation

Keywords

MOS integrated circuits; elemental semiconductors; glass; power MOSFET; power integrated circuits; silicon; thin film transistors; 2D numerical simulator; MEDICI; Si; current drivability; device offset region; glass substrate; high blocking capability; high voltage circuitry; onstate current-pinching effect; polysilicon HV TFT; potential distribution; semiinsulating field plate; thin film transistor; Active matrix technology; Circuits; Ferroelectric materials; Flat panel displays; Glass; Liquid crystal displays; Optical polymers; Optical signal processing; Thin film transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and IC's, 1997. ISPSD '97., 1997 IEEE International Symposium on

Conference_Location

Weimar

ISSN

1063-6854

Print_ISBN

0-7803-3993-2

Type

conf

DOI

10.1109/ISPSD.1997.601505

Filename

601505