Title :
Optimization methods for lookup-table-based FPGAs using Transduction Method
Author :
Yamashita, Shigeru ; Kambayashi, Yahiko ; Muroga, Saburo
Author_Institution :
Fac. of Eng., Kyoto Univ., Japan
fDate :
29 Aug-1 Sep 1995
Abstract :
In recent years Field Programmable Gate Arrays (FPGAs) have emerged as an attractive means to implement low volume applications and prototypes due to their low cost, reprogrammability and rapid turnaround times. Therefore, the need for design methods of FPGAs are getting larger and larger. In this paper, two methods to optimize networks which have been mapped for lookup-table-based FPGAs are discussed. These methods utilize the notion of compatible sets of permissible functions (CSPFs) of Transduction Method. Experimental results show the effectiveness of our methods
Keywords :
field programmable gate arrays; logic CAD; optimisation; programmable logic arrays; table lookup; CSPFs; FPGAs; Transduction Method; compatible sets of permissible functions; logic design; lookup-table; Costs; Digital systems; Field programmable gate arrays; Input variables; Logic circuits; Optimization methods; Prototypes; Reconfigurable logic; Routing; Terminology;
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
DOI :
10.1109/ASPDAC.1995.486245