Title :
Digital vision chips and high-speed vision systems
Author :
Ishikawa, M. ; Komuro, T.
Author_Institution :
Dept. of Inf. Phys. & Comput., Tokyo Univ., Japan
Abstract :
Conventional image processing has a critical limit of frame rate derived from serial transmission of the video signal. In order to overcome the limit, fully parallel processing architecture without scanning has been proposed. In this paper, vision chips with digital circuits and high speed application systems developed in our laboratory are described.
Keywords :
VLSI; computer vision; digital signal processing chips; parallel architectures; digital vision chips; frame rate; fully parallel processing architecture; high speed application systems; high-speed vision systems; Analog circuits; Detectors; Digital circuits; Image processing; Laboratories; Machine vision; Physics; Random access memory; Retina; Signal processing;
Conference_Titel :
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-014-3
DOI :
10.1109/VLSIC.2001.934175
