DocumentCode :
3247776
Title :
Reliable High Speed Data Acquisition System Using FPGA
Author :
Sabat, Samrat L. ; Ajay Kumar, D. ; Rangababu, P.
Author_Institution :
Sch. of Phys., Univ. of Hyderabad, Hyderabad, India
fYear :
2009
fDate :
16-18 Dec. 2009
Firstpage :
392
Lastpage :
396
Abstract :
This paper presents design and implementation of a data acquisition system (DAS) in field programmable gate arrays (FPGA) using system on chip (SoC) methodology. To ensure the reliability of data being transmitted over the channel, a suitable framing interface along with error detection is proposed and interfaced with Xilinx Aurora IP core. The proposed DAS is capable of transmitting the data @ 1.25 Gbps over the channel. The main advantage of the proposed DAS is that the configuration and monitoring is done using the in-built PowerPC processor of FPGA through universal synchronous asynchronous receiver transmitter (UART). This type of DAS is suitable for multi channel acoustic data acquisition and in Electronics Warfare systems.
Keywords :
data acquisition; data communication; field programmable gate arrays; receivers; system-on-chip; telecommunication channels; transmitters; FPGA; Xilinx Aurora IP core; electronics warfare systems; error detection; field programmable gate arrays; high speed data acquisition system; in-built PowerPC processor; multi channel acoustic data acquisition; system on chip; universal synchronous asynchronous receiver transmitter; Bandwidth; Bonding; Cyclic redundancy check; Data acquisition; Data communication; Electronic warfare; Error correction; Field programmable gate arrays; Logic; Protocols;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Trends in Engineering and Technology (ICETET), 2009 2nd International Conference on
Conference_Location :
Nagpur
Print_ISBN :
978-1-4244-5250-7
Electronic_ISBN :
978-0-7695-3884-6
Type :
conf
DOI :
10.1109/ICETET.2009.190
Filename :
5395439
Link To Document :
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