• DocumentCode
    3248408
  • Title

    Design of a concurrent computer for solving systems of linear equations

  • Author

    Jainandunsing, K. ; Deprettere, E.F.

  • Author_Institution
    Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
  • fYear
    1988
  • fDate
    30 May-2 Jun 1988
  • Firstpage
    204
  • Lastpage
    211
  • Abstract
    The systematic synthesis of a systolic array of orthogonal and hyperbolic Householder processor elements for solving large (dense) systems of linear equations is described. The design procedure allows the design of an array which is independent of the size of the problem. The design stage for full problem size arrays was executed with the CAD tool SYSTARS. A special partitioning strategy is used to handle (virtually) infinitely large problems on a fixed-size array. Moreover, the partitioning maintains a high degree of pipelining of the data. A relatively simple architecture for the processor elements of the array is also presented. As a result of the systematic approach, a complete specification of the array is obtained in terms of its interconnections, processor elements, and controller
  • Keywords
    parallel processing; CAD tool SYSTARS; concurrent computer; controller; design procedure; hyperbolic Householder processor elements; interconnections; partitioning strategy; processor elements; systematic synthesis; systems of linear equations; systolic array; Array signal processing; Concurrent computing; Control systems; Design automation; Equations; Feedforward systems; Optical arrays; Optical signal processing; Pipeline processing; Process control; Scientific computing; Signal processing algorithms; Systolic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture, 1988. Conference Proceedings. 15th Annual International Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    0-8186-0861-7
  • Type

    conf

  • DOI
    10.1109/ISCA.1988.5230
  • Filename
    5230