DocumentCode
3249014
Title
A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC
Author
Sugimoto, Y.
Author_Institution
Dept. of Electr. & Commun. Eng., Chuo Univ., Tokyo, Japan
fYear
2001
fDate
14-16 June 2001
Firstpage
207
Lastpage
208
Abstract
A 1 V operational, 20 MS/s MOS sample-and-hold IC, which is applicable to video signal processing, has been developed. The signal-to-noise ratio (SNR) reached 57 dB under the application of +200 μA of differential input signal current at a 1 MHz frequency. The fabrication process was 0.35 μm CMOS with a threshold voltage of +0.35 V for an NMOS device and -0.35 V for a PMOS device.
Keywords
CMOS analogue integrated circuits; current-mode circuits; high-speed integrated circuits; integrated circuit noise; sample and hold circuits; video signal processing; 0.35 micron; 1 V; 57 dB; SNR; current-mode CMOS S/H IC; sample-and-hold IC; signal-to-noise ratio; video signal processing; Application specific integrated circuits; Boosting; CMOS integrated circuits; CMOS process; Frequency; MOS devices; Operational amplifiers; Resistors; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-014-3
Type
conf
DOI
10.1109/VLSIC.2001.934240
Filename
934240
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