Title :
Design and verification of a self-timed RAM
Author :
Nielsen, Lars Skovby ; Staunstrup, Jørgen
Author_Institution :
Dept. of Comput. Sci., Tech. Univ. Denmark, Lyngby, Denmark
fDate :
29 Aug-1 Sep 1995
Abstract :
This paper describes a self-timed static RAM. A single bit RAM is described in the design language SYNCHRONIZED TRANSITIONS and using the verification tools supporting this language, it is shown that the design is speed-independent. Furthermore, a transistor level implementation of the design is presented
Keywords :
SRAM chips; formal verification; logic CAD; logic design; logic testing; specification languages; SYNCHRONIZED TRANSITIONS; design language; self-timed RAM; single bit RAM; static RAM; transistor level implementation; verification tools; Circuits; Computer science; Delay; Formal verification; Power dissipation; Process design; Read-write memory; Robustness; Voltage; Wire;
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
DOI :
10.1109/ASPDAC.1995.486398
