DocumentCode :
3249051
Title :
A profile driven approach for low power synthesis
Author :
Katkoori, Srinivas ; Kumar, Nand ; Rader, Leo ; Vemuri, Ranga
Author_Institution :
Dept. of ECECS, Cincinnati Univ., OH, USA
fYear :
1995
fDate :
29 Aug-1 Sep 1995
Firstpage :
759
Lastpage :
765
Abstract :
A profile driven approach to behavioral synthesis is presented. For a given design and a set of input vectors, the switching activity in the design yields a measure of the power consumption. Every module in a parameterized module library is characterized by its average switching activity per input vector. For a given behavioral specification, simulation using user specified inputs is carried out to collect the profile data of various operations and carriers in the specification. In the performance estimation phase, the profile data with the switching activity data in the precharacterized module library is used to estimate the average switching activity of all the module sets meeting other user specified constraints such as area and delay. The module set with the least estimated switching activity is further synthesized. Experimental results show that the switching activity estimated during synthesis deviates by less than 10% on the average from the actual switching activity measured after completing synthesis
Keywords :
CMOS logic circuits; circuit analysis computing; integrated circuit design; logic CAD; logic design; CMOS technology; average switching activity; behavioral specification; behavioral synthesis; input vector; input vectors; least estimated switching activity; low power synthesis; parameterized module library; performance estimation phase; power consumption; precharacterized module library; profile driven approach; switching activity; switching activity data; user specified constraints; user specified inputs; CMOS technology; Capacitance; Delay estimation; Energy consumption; Libraries; Phase estimation; Power dissipation; Power measurement; Switches; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location :
Chiba
Print_ISBN :
4-930813-67-0
Type :
conf
DOI :
10.1109/ASPDAC.1995.486399
Filename :
486399
Link To Document :
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