DocumentCode
3249174
Title
Fast prototyping for telecom components using a synthesizeable VHDL flexible library
Author
Domenis, Enrico ; Filippi, Enrica ; Licciardi, Luigi ; Paolini, Maurizio ; Turolla, Maura ; Rouquier, Denis
Author_Institution
CSELT, Torino, Italy
fYear
1995
fDate
29 Aug-1 Sep 1995
Firstpage
785
Lastpage
790
Abstract
A flexible synthesis library for fast and safe prototyping of VLSI circuits for telecom applications is presented. Library modules are described in VHDL so as to be portable in different CAD frameworks and easily usable by IC and system designers. Module flexibility is achieved by using generic parameter programming; mapping can be done on FPGAs, semicustom and cell based CMOS libraries. Modules can reach several thousand gates in size and a target frequency of 40 MHz for a CMOS semicustom design. A VLSI MPEG1 audio decoder developed as a methodology test vehicle is finally detailed
Keywords
VLSI; hardware description languages; integrated circuit design; software libraries; subroutines; telecommunication computing; CAD frameworks; CMOS semicustom design; FPGAs; IC; VLSI MPEG1 audio decoder; VLSI circuits; cell based CMOS libraries; fast prototyping; flexible synthesis library; generic parameter programming; library modules; methodology test vehicle; module flexibility; synthesizeable VHDL flexible library; system designers; telecom applications; telecom components; Circuit synthesis; Decoding; Design automation; Field programmable gate arrays; Flexible printed circuits; Frequency; Libraries; Prototypes; Telecommunications; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1995. Proceedings of the ASP-DAC '95/CHDL '95/VLSI '95., IFIP International Conference on Hardware Description Languages. IFIP International Conference on Very Large Scal
Conference_Location
Chiba
Print_ISBN
4-930813-67-0
Type
conf
DOI
10.1109/ASPDAC.1995.486403
Filename
486403
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