DocumentCode :
3249244
Title :
A fully-integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection
Author :
Chunbing Guo ; Chi-Wa Lo ; Yu-Wing Choi ; Issac Hsu ; Kan, T. ; Leung, D. ; Chan, A. ; Luong, H.C.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
fYear :
2001
fDate :
14-16 June 2001
Firstpage :
241
Lastpage :
244
Abstract :
A truly-monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully-integrated fractional-N synthesizer is presented. Implemented in standard 0.5-/spl mu/m CMOS process and without any off-chip component, the receiver measures an image rejection of 79 dB, sensitivity of -90 dBm, IIP3 of -24 dBm and NF of 22 dB with power of 227 mW and a chip area of 5.7 mm/sup 2/. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and settling time of less than 150 /spl mu/s.
Keywords :
CMOS integrated circuits; UHF filters; UHF integrated circuits; frequency synthesizers; radio receivers; 0.5 micron; 150 mus; 22 dB; 227 mW; 900 MHz; IIP3; fractional-N synthesizer; fully-integrated CMOS wireless receiver; image rejection; noise figure; on-chip IF filter; on-chip RF filter; phase noise; sensitivity; settling time; truly-monolithic circuit; Area measurement; CMOS image sensors; CMOS process; Filters; Measurement standards; Power measurement; Radio frequency; Semiconductor device measurement; Synthesizers; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-014-3
Type :
conf
DOI :
10.1109/VLSIC.2001.934252
Filename :
934252
Link To Document :
بازگشت