• DocumentCode
    3249460
  • Title

    Digital controller implementation for non-inverting buck-boost converter using run-time partial reconfiguration of FPGA

  • Author

    Sajeesh, K.K. ; Agarwal, Vivek

  • Author_Institution
    Aeronaut. Dev. Establ., Flight Test Tele-command & Tracking Div., Bangalore, India
  • fYear
    2012
  • fDate
    6-8 Dec. 2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    A novel idea of implementation of digital controller for non-inverting buck-boost converter using run-time self reconfiguration of Field Programmable Gate Array (FPGA) is presented in this paper. FPGA reconfigures itself in real time to change the control strategy as per the input voltage variations to operate the converter either in buck mode or in boost mode or as a combination of buck and boost modes. As the buck and boost controller modules are configured inside the FPGA only when it is needed, this reduces the logic resource usage in each mode and thus the power consumption. Comparison is made between various implementation styles. Implementation details and experimental results are presented in this paper.
  • Keywords
    field programmable gate arrays; power consumption; power convertors; FPGA; digital controller; field programmable gate array; logic resource usage; non-inverting buck-boost converter; power consumption; run-time partial reconfiguration; Batteries; Control systems; Field programmable gate arrays; Logic gates; Power demand; Pulse width modulation; Resource management; Field Programmable Gate Array; dc-dc power converter; pulse width modulation converters; reconfigurable logic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics (IICPE), 2012 IEEE 5th India International Conference on
  • Conference_Location
    Delhi
  • ISSN
    2160-3162
  • Print_ISBN
    978-1-4673-0931-8
  • Type

    conf

  • DOI
    10.1109/IICPE.2012.6450422
  • Filename
    6450422