DocumentCode
3250014
Title
Design of 3D Optical Network on Chip
Author
Gu, Huaxi ; Xu, Jiang
Author_Institution
ECE, Hong Kong Univ. of Sci. & Technol., Hong Kong, China
fYear
2009
fDate
14-16 Aug. 2009
Firstpage
1
Lastpage
4
Abstract
Optical network on chip is an emerging research topic, which can provide low latency and high bandwidth with significantly lower power dissipation. A 3D mesh based optical network on chip is developed together with a new optical router architecture as the basic units. The new router fully utilizes the properties of dimension order routing in 3D mesh networks, and reduce the number of microresonators required for ONoCs. We compared the loss property of the new router with four other schemes. The results show that the new router achieves the lowest loss for the longest path in the network of the same size. The proposed 3D mesh ONoC is compared with 2D counterpart in three aspects, i.e. energy, latency and throughput. The comparison of power consumption with electronic and 2D counterpart show that 3D ONoC can save about 79.9% energy compared to electronic one, 24.3% energy to the 2D ONoC, all containing 512 IP cores. The simulation of the network performance of the 3D mesh ONoC is carried out by OPNET under different configurations. The results also show the performance improvement over the 2D ONoC.
Keywords
network-on-chip; optical fibre networks; power consumption; 3D mesh ONoC; 3D mesh based optical network; microresonators; network on chip; optical router; power consumption; Bandwidth; Delay; Mesh networks; Microcavities; Network-on-a-chip; Optical design; Optical fiber networks; Optical network units; Power dissipation; Routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Photonics and Optoelectronics, 2009. SOPO 2009. Symposium on
Conference_Location
Wuhan
Print_ISBN
978-1-4244-4412-0
Type
conf
DOI
10.1109/SOPO.2009.5230071
Filename
5230071
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