DocumentCode
32501
Title
Exploring the Design of the Magnetic–Electrical Interface for Nanomagnet Logic
Author
Shiliang Liu ; Xiaobo Sharon Hu ; Niemier, Michael T. ; Nahas, Joseph J. ; Csaba, Gyorgy ; Bernstein, Gary H. ; Porod, Wolfgang
Author_Institution
Dept. of Comput. Sci. & Eng., Univ. of Notre Dame, Notre Dame, IN, USA
Volume
12
Issue
2
fYear
2013
fDate
Mar-13
Firstpage
203
Lastpage
214
Abstract
Nanomagnet logic (NML) has received increasing attention as an alternative information processing technology given the potential for low energy dissipation, a relatively advanced experimental state of the art, and intangibles such as inherent radiation hardness and nonvolatility. In order to facilitate the integration of NML-based circuits with transistor-based circuits, a magnetic-electrical interface (MEI) is needed. This paper focuses on the output portion of MEI design, i.e., converting signals from the magnetic domain to the electrical domain. The basic idea of an MEI output is to employ fringing fields from an NML device to set the magnetization state of the free layer of a magnetic tunnel junction. A detailed study of four different MEI output designs is presented which considers metrics such as the clock energy required to set the output state, the magnetoresistance ratio, etc. Simulation-based analysis reveals the pros and cons of each design. A design where multiple NML devices (i.e., free layers) share a large synthetic antiferromagnet is most promising based on our simulation-based, quantitative analysis.
Keywords
logic design; magnetic logic; magnetic tunnelling; nanomagnetics; transistor circuits; MEI design; NML-based circuits; clock energy; electrical domain; information processing technology; large synthetic antiferromagnet; low energy dissipation; magnetic domain; magnetic tunnel junction; magnetic-electrical interface design; magnetization state; magnetoresistance ratio; nanomagnet logic; radiation hardness; simulation-based analysis; simulation-based quantitative analysis; transistor-based circuits; Clocks; Fabrication; Logic gates; Magnetic domains; Magnetic tunneling; Magnetization; Switches; Magnetic tunnel junction (MTJ); magnetic–electrical interface (MEI); magnetoresistance (MR); micromagnetics; nanomagnet logic (NML); simulation; synthetic antiferromagnet (SAF);
fLanguage
English
Journal_Title
Nanotechnology, IEEE Transactions on
Publisher
ieee
ISSN
1536-125X
Type
jour
DOI
10.1109/TNANO.2013.2243467
Filename
6422397
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