A novel P+ polysilicon/N-SiC heterojunction trench gate vertical FET

The high breakdown field in SiC allows the use of much higher doping and thinner drift region widths for a given voltage rating than is required by silicon power devices. The specific on-resistance of the drift region in SiC FETs has been projected to be 200 times smaller than that of silicon FETs. However the development of SiC MOSFETs has been hampered by extremely low inversion layer mobilities and lack of good quality oxide on P-type SiC. For this reason, vertical SiC U-MESFET (SIT) structures need to be investigated. The fabrication of a U-MESFET involves filling deep trenches with metal (a difficult process). Further, a complex process is required to isolate the metal gate from the source. In this paper, a novel P⁺-polysilicon/N^- SiC heterojunction gate FET (HJFET) structure is proposed which solves these problems