• DocumentCode
    3250407
  • Title

    Cavity-down thermal-enhanced package reliability evaluation for low-k dielectric/Cu interconnects IC

  • Author

    Tsao, Pei-Haw ; Huang, Chender ; Lin, Allan ; Lii, Mimg-Ji ; Perng, D.J. ; Tsai, Nun-Sian

  • Author_Institution
    Taiwan Semicond. Manuf. Co. Ltd, Hsinchu, Taiwan
  • Volume
    2
  • fYear
    2004
  • fDate
    1-4 June 2004
  • Firstpage
    1191
  • Abstract
    It has been well recognized that IC packaging materials have a great impact on the IC chip integrity of chips fabricated by low dielectric constant inter-metal-dielectric (Low-k IMD) materials. To understand the effect of the package process and material in the cavity-down thermal-enhanced BGA package on Low-k IMD chip integrity, packages characterization by both encapsulation process and transfer-mold process was performed. The package samples were built with two different encapsulants and two different molding compounds. The test result showed that encapsulants induced chip corner defects due to the high shrinkage rate and free-body movement of the encapsulant during curing process. The defects led to package early reliability fail with Low-k IMD delamination failure mode. The transfer-mold type cavity-down BGA with low coefficient of thermal expansion (CTE) compound yielded most promising package reliability test results to realize the cavity-down package solution for Low-k chip.
  • Keywords
    curing; delamination; encapsulation; flip-chip devices; integrated circuit packaging; integrated circuit reliability; thermal management (packaging); transfer moulding; IC chip integrity; IC packaging; cavity-down package; chip corner defects; curing process; delamination failure; encapsulation process; free-body movement; high shrinkage rate; low coefficient of thermal expansion; low dielectric constant intermetal-dielectric; low-k chip; thermal-enhanced package reliability; transfer-mold process; Assembly; Delamination; Dielectric materials; Electronic packaging thermal management; Electronics packaging; Encapsulation; Integrated circuit packaging; Semiconductor materials; Testing; Thermal stresses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2004. Proceedings. 54th
  • Print_ISBN
    0-7803-8365-6
  • Type

    conf

  • DOI
    10.1109/ECTC.2004.1319061
  • Filename
    1319061