Title :
Study of super cut-off CMOS technique in presence of the gate leakage current
Author :
Madani, N. Moezzi ; Tavassoli, B. ; Behnam, A. ; Afzali-Kusha, A.
Author_Institution :
Dept. of ECE, Tehran Univ., Iran
Abstract :
Super cut-off method as a well-known technique to reduce leakage power is investigated for its operational characteristics in the sub 100 nm technology nodes. Specially, the effect of the gate leakage in power consumption is considered and a design routine for optimizing the circuit in this regard is proposed. A right design methodology can improve the power and the circuit performance efficiently.
Keywords :
CMOS integrated circuits; circuit optimisation; integrated circuit design; leakage currents; low-power electronics; power consumption; 100 nm; circuit optimisation; gate leakage current; integrated circuit design; leakage power reduction; power consumption; super cut off CMOS technique; transistor operational characteristics; CMOS technology; Charge pumps; Digital circuits; Energy consumption; Gate leakage; Leakage current; MOSFETs; Pins; Power dissipation; Threshold voltage;
Conference_Titel :
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN :
0-7803-8656-6
DOI :
10.1109/ICM.2004.1434196
